| 型號(PratNumber) | GL3227E |
| 數量(QTY.) | 9000 |
| 廠家(Brand) | GENESYS/創惟科技 |
| 封裝(Package) | QFN48 |
| 批號(DC.) | 23+ |
| 聯系人(contact) | 顏先生/William |
| 電話(contact) | 0755-82170220,21001680 |
| PDF(PDF.) |
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| 詢價(Inquire) |
GL3227E USB 3.2 Gen 1 to e•MMC HS400 RAID0 Bridge Controller
GL3227E是一款USB 3.1 Gen 1 eMMC RAID讀卡器，它提供單個LUN（邏輯單元號），可以支持;MMC v5.0、1/4/8bit數據總線、高速SDR/高速DDR/HS200/HS400模式。
GL3227E集成了高速8051微處理器和高效硬件引擎，可在USB和各種存儲卡接口之間實現的數據傳輸性能。它支持串行外圍接口（SPI），通過USB端口將固件升級到SPI閃存。它還集成了5V至3.3V和3.3V至1.8V/1.2V的穩壓器和功率MOSFET，可以降低系統BOM成本。
USB specification compliance
Comply with Universal Serial Bus 3.0 Specification rev. 1.0 (USB 3.1 Gen 1)
Comply with Universal Serial Bus Specification rev. 2.0 (USB 2.0)
Comply with USB Mass Storage Class Specification rev. 1.0
Support USB Mass Storage Class Bulk-Only Transport (BOT)
Support 1 device address and up to 3 endpoints: Control (0) / Bulk Data Read In (1) / Bulk Data Write Out (2)
Support 5 Gbps SuperSpeed, 480 Mbps high-speed, and 12 Mbps full-speed transfer rates
Integrated USB building blocks
USB2.0 transceiver macrocell (UTM), Serial Interface Engine (SIE), embedded Power-On Reset (POR)
Embedded high speed 8051 micro-controller
High efficient DMA hardware engine improves transfer rate between USB and flash card interfaces
Support Embedded MultiMediaCard TM (e•MMC)
e•MMC specification v4.3/ v4.4/ v4.5/ v5.0
High Speed SDR/ High Speed DDR/ HS200/ HS400
Support Serial Peripheral Interface (SPI) for firmware upgrade to SPI Flash Memory via USB interface
Support firmware stored in eMMC and upgrade firmware via USB interface
On-Chip 5V to 3.3V, 3.3V to 1.8V/1.2V regulator
On-Chip power MOSFETs for flash media cards power source
On-Chip 1.8V power source for VCCQ of e•MMC to operate as HS200/HS400 mode.
On board 25 MHz Crystal driver circuit
Support USB 2.0 LPM (Link Power Management)
Support USB 3.1 Gen 1 LTM (Latency Tolerance Messaging)
Support USB 3.1 Gen 1 U1/U2/U3 low power link state
Pass the USB-IF Test Procedure for SuperSpeed product (TID: 341010008)
Support two e•MMC chips by RAID 0 to increase the reading/writing performance
Support one or two e•MMC chips by PCB co-layout, flexible for product design
Support reset control of e•MMC for better compatibility
Support PIA (Partition Information Area) in e•MMC to store customized VID/PID, USB device descriptor, SCSI inquiry and EEP configuration to save extra BOM cost
Support programmable SSC (Spread Spectrum Clocking), clock rate in memory card interface for better EMI test effect
Support Over-Current protection mechanism
Support one power/access indicator LED (shared with SPI_MOSI)
Available in QFN48 pin package (6x6mm)
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